Implementace software na Test Generation a Fault Diagnosis
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dc.contributor.advisor |
Perůtka, Karel
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dc.contributor.author |
Sedláček, Jakub
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dc.date.accessioned |
2012-03-11T14:56:21Z |
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dc.date.available |
2012-03-11T14:56:21Z |
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dc.date.issued |
2011-05-23 |
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dc.identifier |
Elektronický archiv Knihovny UTB |
cs |
dc.identifier.uri |
http://hdl.handle.net/10563/18395
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dc.description.abstract |
Hlavním cílem diplomové práce bylo vytvořit laboratorní úkoly na problematiku diagnostiky integrovaných obvodů. Práce je zaměřena na použité metody na odhalování chyb v logických obvodech. V další části je práce zaměřena na software, který bude sloužit k vypracování laboratorních úloh. Dále obsahuje popis tohoto programu a laboratorní úlohy k vypracování. |
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dc.format |
127 s |
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dc.format.extent |
3808780 bytes |
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dc.format.mimetype |
application/zip |
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dc.language.iso |
cs |
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dc.publisher |
Univerzita Tomáše Bati ve Zlíně |
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dc.rights |
Bez omezení |
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dc.subject |
Test Generation
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en |
dc.subject |
Fault Diagnosis
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dc.subject |
Diagnosis
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dc.subject |
Fault Table
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dc.subject |
Test vectors
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dc.subject |
Electronic Circuit
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dc.subject |
Test Generation
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cs |
dc.subject |
Faul Diagnosis
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dc.subject |
Diagnostika
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dc.subject |
Tabulka chyb
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dc.subject |
Testovací vektor
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dc.subject |
Elektronický obvod
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dc.title |
Implementace software na Test Generation a Fault Diagnosis |
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dc.title.alternative |
Implemetation of software for Test generation and Fault Diagnosis<br> |
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dc.type |
diplomová práce |
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dc.contributor.referee |
Škuta, Jaromír |
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dc.date.accepted |
2011-06-13 |
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dc.description.abstract-translated |
The main objective of this thesis was to create laboratory diagnostic tasks on the issues of integrate circuits. The work is focused on the method used to detect faults in logic circuits. In another part of the work is focused on software that will be used to develop laboratory exercises. Further it contains a description of this program and to develop laboratory tasks. |
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dc.description.department |
Ústav elektroniky a měření |
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dc.description.result |
obhájeno |
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dc.parent.uri |
http://hdl.handle.net/10563/153
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dc.parent.uri |
http://hdl.handle.net/10563/220
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dc.thesis.degree-discipline |
Bezpečnostní technologie, systémy a management |
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dc.thesis.degree-discipline |
Security Technologies, Systems and Management |
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dc.thesis.degree-grantor |
Tomas Bata University in Zlín. Faculty of Applied Informatics |
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dc.thesis.degree-grantor |
Univerzita Tomáše Bati ve Zlíně. Fakulta aplikované informatiky |
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dc.thesis.degree-name |
Ing. |
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dc.thesis.degree-program |
Engineering Informatics |
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dc.thesis.degree-program |
Inženýrská informatika |
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dc.identifier.stag |
20429
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dc.date.assigned |
2011-02-25 |
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utb.result.grade |
B |
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local.subject |
laboratorní úlohy
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cs |
local.subject |
integrované obvody
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cs |
local.subject |
testování obvodů
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cs |
local.subject |
laboratory exams
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en |
local.subject |
integrated circuits
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en |
local.subject |
testing of circuits
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en |
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